Verace V1

什麼是 Verace V1？

Verace V1 replaces four standard transformer subsystems (attention, KV cache, mixture-of-experts, fixed-depth compute) with continuous, manifold-constrained alternatives: linear-cost attention via an orthogonal state update, O(1) memory with no KV cache, no cross-device expert dispatch, and real per-token adaptive depth. Every manifold and conservation claim is backed by an executable test, not just derived on paper. Reference implementation only, no pretrained weights yet.